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Introduction To Multi-Rate Compatibility Of 10G Copper SFP Modules Based On AQR113C

Time: 2023-07-14
        This article describes the multi-rate compatibility of the host interface and twisted-pair interface for 10GbE copper SFP modules based on the Marvell AQR113C solution.
1. Host Interface
        The host interface of the AQR113C-based 10GbE SFP module is fixed in 10G XFI mode and does not support rate adaptation.
        Therefore, the module can only work normally on switch ports pre-configured to 10G speed; otherwise, it will fail to link up.
2. Twisted-Pair (RJ45) Interface
        When interconnected with a remote device, the module supports auto-negotiation across 10/100/1000 Mbps, 2.5G/5G/10G rates, and automatically matches the remote port speed.
        ▪ If the remote port is fixed at 10G, 1G, or another single rate, the module will adapt accordingly.
        ▪ If the remote port supports multi-rate auto-negotiation, the link will establish at the highest mutually supported rate.
        ▪ This makes the module highly flexible for various Ethernet deployment scenarios.
Marvell AQR113C Solution Multi-Rate Compatibility Block Diagram
Figure 1 Marvell AQR113C Solution Multi-Rate Compatibility Block Diagram
        Supported rates and transmission distances:
        ▪ 10GBase-T (10G): Up to 30 meters over Cat 6A cable
        ▪ 5GBase-T (5G): Up to 70 meters over Cat 5E cable
        ▪ 2.5GBase-T (2.5G): Up to 100 meters over Cat 5E cable
        ▪ 10/100/1000Base-T: Up to 100 meters over Cat 5E cable
3. Flow Control Mechanism
        The AQR113C integrates MACSec for Ethernet security and also implements built-in flow control.
        The chip includes a 64KB buffer on both the host side and cable side, which supports integrity check (ICV) and sends pause frames based on buffer occupancy.
        When the module runs at 10G, both the host side and cable side operate at 10G. No rate conversion is required, and full 10G bandwidth is maintained.
        When the cable side negotiates to a rate below 10G while the host side remains at 10G, internal rate conversion is performed.
        Taking 2.5G as an example:
        ▪ Receive direction: The chip receives data at 2.5G from the remote end and transmits to the host MAC at 10G. Since the receive rate is much lower than the transmit rate, no frame overflow occurs.
        ▪ Transmit direction: The host MAC sends data to the AQR113C at 10G, but the chip transmits to the remote end at only 2.5G. The 64KB buffer would fill rapidly without flow control.
        To prevent overflow, the PHY SYSMAC sends a pause frame to the host MAC when the buffer approaches the upper threshold, temporarily halting transmission.
        Once the buffer is nearly empty, SYSMAC signals the host MAC to resume sending. This mechanism avoids frame loss and stabilizes the effective bandwidth at 2.5G.
        The pause/resume thresholds can be configured based on buffer fill levels. For detailed settings, refer to the AQR113C datasheet.
AQR113C program flow control block diagram
Figure 2 AQR113C Solution Flow Control Block Diagram
        Moduletek's 10GbE SFP copper modules based on the AQR113C solution deliver stable performance at a competitive price.
        Moduletek Limited is at your service.
        For further inquiries about the above content, please contact us at: sales@moduletek.com
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